Semiconductor devices are used in a variety of electronic applications, such as personal computers, cell phones, digital cameras, and other electronic equipment, as examples. Semiconductor devices are typically fabricated by sequentially depositing insulating or dielectric layers, conductive layers, and semiconductive layers of material over a semiconductor substrate, and patterning the various layers using lithography to form circuit components and elements thereon.
Optical photolithography involves projecting or transmitting light through a pattern made of optically opaque areas and optically clear areas on a lithography mask or reticle. For many years in the semiconductor industry, optical lithography techniques such as contact printing, proximity printing, and projection printing have been used to pattern material layers of integrated circuits. In optical lithography, lens projection systems and transmission lithography masks are used for patterning, wherein light is passed through the lithography mask to impinge upon a photosensitive material layer disposed on a semiconductor wafer or workpiece. The patterned photosensistive material layer is then used as a mask to pattern a material layer of the workpiece.
A transistor is an element that is utilized extensively in semiconductor devices. There may be millions of transistors on a single integrated circuit (IC), for example. A common type of transistor used in semiconductor device fabrication is a metal oxide semiconductor field effect transistor (MOSFET). A transistor typically includes a gate dielectric disposed over a channel region, and a gate formed over the gate dielectric. A source region and a drain region are formed on either side of the channel region within a substrate or workpiece.
A complementary metal oxide semiconductor (CMOS) device is a device that utilizes p channel metal oxide semiconductor (PMOS) field effect transistors (FETs) and n channel metal oxide semiconductor (PMOS) field effect transistors (FETs) in a complementary arrangement. One example of a memory device that uses both PMOS FETs and NMOS FETs is a static random access memory (SRAM) device. A typical SRAM device includes arrays of thousands of SRAM cells, with each SRAM cell having four or six transistors, for example. A commonly used SRAM cell is a six-transistor (6T) SRAM cell, which has two PMOS FETs interconnected with four NMOS FETs.
One challenge in transistor manufacturing processes is the patterning of the transistor gates. Reducing the final tip-to-tip (T2T) distance of gate conductor line ends in SRAM cells to the desired target values has become one of the major patterning challenges for CMOS technologies with smaller ground rules, for example. Limitations in optical resolution and space angle dependent variations in etch/redeposition processes may result in device features not printing in desired shapes or sizes. Efforts to compensate for line end shortening in patterned device structures by length corrections of corresponding mask features may be restricted by geometrical limitations on the mask or limited resolution capability of the exposure tool.
Thus, what are needed in the art are improved methods of patterning transistor gates and other features of semiconductor devices.